The project Digital Calculator is based on 74 series and 40 series logic and it is submitted for "Open 7400 Logic Contest" organized by Dangerous Prototypes.

Figure 1 - Bird View of the board

I, Umair Mukati and Naveed Ahmed are the students at IIEE (Institute of Industrial Electronics Engineering), located in Karachi, Pakistan. We are currently in the 6^th semester of this course. The institute is under the affiliation of NEDUET (Nadirshaw Eduljee Dinshaw University of Engineering & Technology), located in Karachi, Pakistan, and it is a one of the department of PCSIR (Pakistan Council of Scientific and Industrial Research). It was founded by the Swiss and Pakistani Government in 1985.

The project “DIGICALC” (Digital Calculator with Clear and Backspace) is one of an inspiration and was actually made as the assignment of our Digital Electronics II course. The project involves the techniques that we learnt in that course, from simple gate logic to the synchronous counters.

We first implemented it to a simulation, starting just from a basic binary format addition. The subtraction function is then added thereby. The implementation of keypad was a real issue, including the shifting numbers added one after another. Therefore we used 15 SPST push buttons instead of hex keypad, to simplify our requirements. We developed logic that if a number is pressed after another then it will shift the previous number using parallel shift registers.

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This project is made to perform calculations on 5-Bit signed data. Meanwhile we also need to implement logic to detect the type of input user pressed, and to perform operation as required. After all these things have been implemented we just need to display our data using 7-segment decoder to 7-segment display.

All of that works perfect in simulation but in order to materialize it, we must have to design a circuit where all sorts of issues should be negligible. The implementation of this huge circuit just by the skills we learnt in PCB Fabrication course is a big challenge for us.

After fabrication and doing a bit of troubleshooting we have been succeeded in our aim. Credit goes to Naveed Ahmed for his skills on troubleshooting and detecting the errors.

We got much appreciation from our teachers after submitting this project. And we hope that at Open 74XX Contest, it’ll be going to secure a highest position, InshaALLAH (if GOD wish to).

   II.            Usage Guide

Figure 2 - 7-Segment Display

Figure 3 - Keypad

III.            List of Components

The components utilized in making this project are listed below:

IV.            Design DESCRIPTION

        i.            Numeric Data Input Section

The 74147(10-to-4 line Priority Encoder) as shown is used for encoding the data provided by the user, then an array of NOT gate is used at the output to covert the logic from active high to active low. Due to priority encoder if more than two buttons are pressed at a time only the larger number gets input.

Figure 4 - Numeric Input Section

     ii.            Processing Greater Numbers

The 4035(Shift register IC) used to store a single input from the button. The schematic have two 4035 ICs. When a button is pressed a clock is passed to each register and the input is stored temporarily in the first register, if the input is pressed for the second time before pressing any operation button, the MSB of the first input passed to second shift register, i.e. in order to generate a number greater than 9 but less than 16. Now a full adder (7483) is used to add a 10 in the second input, now the sum is passed to another pair of shift registers to be saved as the “Actual Fist Input ” on which the arithmetic is to be performed.

Figure 5 - Full Adder & Shift Registers

   iii.            Input Data Manipulation

This second pair of shift register (4035) is used to hold the two actual inputs on which the arithmetic operation is to be performed. ‘+/-’ operation buttons are used as a clock source for these shift registers. When a ‘+’ or ‘-’ button is pressed the first input shifts to the second register.

Figure 6 - Second pair of Shift Registers

   iv.            “THE CALCULATION”

This is the main part of the schematic, it serves as the ‘BRAIN’ of the calculator, and it is used to add/subtract the two inputs.

Figure 7 - Data Operation Portion

The XOR gate array is used to make “True/Complement Logic”, it is used to complement a input if subtraction is desired, the full adder IC’s are used to add the resulting numbers after True/Complement operation, the 2 And + OR gate (below, right) is used to add 9 in the answer if the sum or difference of the two inputs is greater than 9, to make the answer in BCD format, to be able passed it to the BCD-7 segment for display purpose.

      v.            Sign Determination

Comparator IC 7485, as the name suggest, is used to compare the digital inputs and display negative sign when necessary.

Figure 8 - Comparison for Sign Determination

   vi.            Operation Selection:

Two 7476 (Dual JK flip-flop with set reset), are used to select the arithmetic operation between subtraction (-) and addition (+) and for equal (=) and clear answer operation.

Figure 9 - Operation Selection

vii.            Power-On Configuration

The 555 timer IC is used to produce a short duration high pulse during POWER ON of the calculator, the purpose of this pulse is to configure JK flip flops (as shown in part VI) to the set condition, so that the arithmetic operation is sum and the answer is cleared by default.

Figure 10 - Monostable Implementation from 555 Timer

viii.            Dealing with some wild errors

Whenever the +/- button is pressed the contents of temporary shift registers (Error! Reference source not found.) are cleared but the same buttons are used to provide clock to the second pair of shift registers (iii), this creates a problem because the contents gets cleared before it can be passed to the second pair of the registers. To solve this problem a 74122 (Retrigger-able Monostable Multivibrator) is used to clear the temporary registers after a short delay of some milliseconds, so that data can be passed to permanent place (second pair of registers).

Figure 11 - Retrigger-able Monostable Multivibrator

   ix.            Multiplexing the DISPLAY

The display of the calculator is multiplexed using 74157(Quadruple Multiplexer), By default the selection is set to A so that the input button can be displayed, but with the press of equal button, the selection is set to B, so that answer can be displayed, when clear answer button is pressed the selection is set to A again, and so on. BCD to 7-Segment IC (7447) is used to decode the data accordingly.

Figure 12 - Multiplexed display

          Demonstration

I.            Schematic & Layout

These can be downloaded from 4shared.

 .            Documentation

Digital Calculator.pdf